1. Field of the Invention
The present invention relates to clock circuits and, more particularly, to a laser powered clock circuit with a substantially reduced clock skew.
2. Description of the Related Art
Integrated circuits typically have clock circuits, commonly based on crystal oscillators, that generate and distribute synchronized clock signals to the various circuits within the integrated circuits. In most cases, a generated clock signal is distributed in parallel from a common clock node. In this case, a large number of clock lines extend away in parallel from the common clock node to the various circuits.
It is often the case that the physical lengths of the clock lines vary considerably due to the differing proximities of the circuits to the common clock node. This, in turn, means that an edge of the clock signal from the common clock node will arrive at the different circuits at slightly different times. This difference in propagation time can accumulate over additional gates, and lead to timing issues known as clock skew.
As a result, there is a need for a clock circuit that can generate and distribute a synchronized clock signal that substantially reduces or eliminates clock skew.